Memory with simultaneous sequential and random address modes

Details Memory with simultaneous sequential and random address modes Memory with simultaneous sequential and random address modes

1977-12-27

1978-10-10

Hecker, Stuart N.

Static information storage and retrieval

Addressing

Sequential

364200, 365230, G11C 800

Patent

active

041200489

ABSTRACT:
This is a consolidated memory element allowing two simultaneously occurring independent accesses to take place. As disclosed, the apparatus contains both a random address mode and a sequential address mode to allow the simultaneous modes of (1) random read/sequential read, (2) random read/sequential write, (3) random write/sequential read.

REFERENCES:
patent: 3638204 (1972-01-01), Kolankowsky

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