Static information storage and retrieval – Addressing
Patent
1985-02-07
1988-01-12
Moffitt, James W.
Static information storage and retrieval
Addressing
365200, G11C 800
Patent
active
047196025
ABSTRACT:
A semiconductor memory device having an improved system for randomly accessing a preselected set of memory locations. The invention includes a set of "secondary sense amplifiers" which act as a high speed buffer between the memory's normal sense amplifiers and the memory's data input and output buffers. The secondary sense amplifiers are connected to selected ones of the sense amplifiers in accordance with a first predefined subset of the memory's column address signals. A decoder circuit, which is directly responsive to a second predefined subset of the column address signals, selects one of the secondary sense amplifiers and connects it to the memory's data input and output buffers. Since the decoder is directly responsive to the second predefined subset of the column address signals and does not need to latch in new address values after the detection of an address signal transition, all the secondary sense amplifiers can be accessed much faster than the other data storage locations in the memory.
REFERENCES:
patent: 4344156 (1982-08-01), Eaton, Jr. et al.
patent: 4396845 (1983-08-01), Nakano
patent: 4616347 (1986-10-01), Bernstein
Bagnall Peter J.
Hag Mohammed E. U.
Moffitt James W.
Visic, Inc.
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