Device and method for reading non-volatile memories having...
Device and method for reducing idle cycles in a...
Device and method for selecting power down exit
Device for the self-synchronization of the output circuits of a
Device in a memory circuit for definition of waiting times
Device in a memory circuit for definition of waiting times
Devices and methods for controlling active termination...
Devices and methods for controlling active termination...
Devices for synchronizing clock signals
Differential clock crossing point level-shifting device
Digital delay locked loop implementation for precise control...
Digital delay, digital phase shifter
Distributed balanced address detection and clock buffer circuitr
Distributed write data drivers for burst access memories
DLL circuit and a memory device building the same in
Double buffer type elastic store comprising a pair of data memor
Double data rate synchronous dynamic random access memory...
DQS postamble filtering
DQS postamble filtering
DQS postamble filtering