Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2005-03-01
2005-03-01
Lam, David (Department: 2818)
Static information storage and retrieval
Addressing
Sync/clocking
C365S148000, C365S226000
Reexamination Certificate
active
06862249
ABSTRACT:
An active termination circuit is mounted in a memory circuit and includes a termination resistor which provides a termination resistance for the memory circuit, and a control circuit which receives an externally supplied active termination control signal, and which selectively switches on and off the termination resistor in response to the active termination control signal. The control circuit includes a synchronous input buffer and an asynchronous input buffer which each receive the active termination control signal, and a switching circuit which selectively outputs an output of said synchronous input buffer or an output of said asynchronous input buffer according to an operational mode of the memory circuit. The output of the switching circuit controls an on/off state of said termination resistor.
REFERENCES:
patent: 4748426 (1988-05-01), Stewart
patent: 5867446 (1999-02-01), Konishi et al.
patent: 6172936 (2001-01-01), Kitazaki
patent: 20030099138 (2003-05-01), Kyung
Lam David
Samsung Electronics Co,. Ltd.
Volentine Francos & Whitt PLLC
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