Devices for synchronizing clock signals

Details Devices for synchronizing clock signals Devices for synchronizing clock signals

2006-02-07

2006-02-07

Phung, Anh (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S194000

Reexamination Certificate

active

06996026

ABSTRACT:
A clock signal synchronizing device includes a first delay unit with variable delay time connected to an input circuit with a first delay time which receives a first clock signal and outputs a second clock signal. A second delay unit has a fixed delay time portion corresponding to the first delay time, and an additional variable delay time portion. A first phase comparison unit has a first input connected to the output of the input circuit, and a second input connected to the output of the second delay unit. The output signal controls the delay time of the first delay unit. A copy of the input circuit has an input connected to the output of the first delay unit. A second phase comparison unit has an input connected to the output of the copy, and an output signal controls the variable delay time portion of the second delay unit.

REFERENCES:
patent: 5939913 (1999-08-01), Tomita
patent: 6100733 (2000-08-01), Dortu et al.
patent: 6212127 (2001-04-01), Funaba et al.
patent: 6298004 (2001-10-01), Kawasaki et al.
patent: 6346839 (2002-02-01), Mnich
patent: 6538957 (2003-03-01), Magoshi
patent: 0964517 (1999-12-01), None

Affiliated with

Also associated with

Rating

Devices for synchronizing clock signals does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Devices for synchronizing clock signals, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Devices for synchronizing clock signals will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3654006