LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...

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Nonplanar semiconductor device with partially or fully...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Nonplanar transistors with metal gate electrodes

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

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Nonvolatile devices with P-channel EEPROM devices as injector

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile ferroelectric memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile ferroelectric memory without a separate cell...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile floating-gate memory devices, and process of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memories and methods of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memories and methods of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memories with a floating gate having an upward...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memories with floating gate spacers, and methods...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memories with high capacitive-coupling ratio

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memory and manufacturing method thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

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Nonvolatile memory and method for fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memory and method for fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memory cell and method of fabricating the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Nonvolatile memory cell comprising a reduced height vertical...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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