LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...,Having insulated gate

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Vertical device formed adjacent to a wordline sidewall and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Vertical device with optimal trench shape

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical diode structures with low series resistance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Patent

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Vertical double diffused MOSFET and method for manufacturing...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical double-channel silicon-on-insulator transistor and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical DRAM cell with TFT over trench capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical DRAM device with self-aligned upper trench shaping

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical DRAM punchthrough stop self-aligned to storage trench

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical dual gate field effect transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical field effect transistor with metal oxide as...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical field-effect transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical flash memory cell with buried source rail

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical floating gate transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical floating gate transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical floating gate transistor with epitaxial channel

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical gain cell

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical gain cell and array for a dynamic random access...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical gate CMOS with lithography-independent gate length

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical gated access transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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Vertical gated access transistor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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