Vertical device with optimal trench shape

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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C438S244000, C438S396000, C438S931000

Reexamination Certificate

active

07129129

ABSTRACT:
A method of forming a trench in a semiconductor substrate includes a step of converting the cross section of the upper portion of the trench from octagonal to rectangular, so that sensitivity to alignment errors between the trench lithography and the active area lithography is reduced. Applications include a vertical transistor that becomes insensitive to misalignment between the trench and the litho for the active area, in particular a DRAM cell with a vertical transistor.

REFERENCES:
patent: 4673962 (1987-06-01), Chatterjee et al.
patent: 5888864 (1999-03-01), Koh et al.
patent: 6432774 (2002-08-01), Heo et al.
patent: 6583462 (2003-06-01), Furukawa et al.
patent: 6740555 (2004-05-01), Tews et al.
patent: 6781196 (2004-08-01), So et al.

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