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SOI DRAM with buried capacitor under the digit lines...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI DRAM with buried capacitor under the digit lines...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI DRAM without floating body effect

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI FET with source-side body doping

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI field effect transistors with body contacts formed by...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI MOS field effect transistor and manufacturing method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI MOSFET and method of fabrication

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI MOSFET with graded source/drain silicide

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI MOSFETS exhibiting reduced floating-body effects

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI semiconductor integrated circuit for eliminating...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI stacked DRAM logic

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI structure and method of producing same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI transistor having an embedded strain layer and a reduced...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI transistor with self-aligned ground plane and gate and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI trench capacitor cell incorporating a low-leakage...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI type integrated circuit with a decoupling capacity and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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SOI-BiCMOS method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Solid electrolytic capacitor and method for producing the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Solid phase epitaxy activation process for source/drain...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Solid phase epitaxy recrystallization by laser annealing

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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