SOI-BiCMOS method

Details SOI-BiCMOS method SOI-BiCMOS method

1996-04-22

1998-12-08

Dutton, Brian

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438311, 438339, 438355, 438374, 438377, H01L 218238, H01L 21331, H01L 218222

Patent

active

058468587

ABSTRACT:
In a manufacturing method for lateral bipolar transistors on an SOI substrate, a ridge-shaped gate electrode (8/9) is applied onto a mesa (3) provided with a basic doping and is covered surface-wide with a TEOS layer (10) that has vertical portions functioning as spacers (11,12) at the sidewalls of this gate electrode. Dopants for a collector region (4) and an emitter region (6) are introduced using lacquer masks (13,14). After the removal of the TEOS layer (10), the base implantation ensues in the region of the spacer (11) along an edge of the gate electrode.

REFERENCES:
patent: 3598664 (1971-08-01), Kilby
patent: 5147818 (1992-09-01), Hikida
Patent Abstracts of Japan, (E-1537) Apr. 14, 1994, vol. 18, No. 210, Thin Film Bipolar Transistor and Thin Film Semiconductor Device Using It, H. Yamada, JP 6-13397.
Patent Abstracts of Japan, (E-1361) May 11, 1993, vol. 17, No. 230, Manufacture of Semiconductor Device, K. Suzuki, JP 4-360539.
Patent Abstracts of Japan (E-1541) Apr. 22, 1994, vol. 18, No. 225, Semiconductor Device and Manufacture Thereof, K. Arai, JP 6-21077.
IEEE Electron Device Letters, vol. 4, No. 8, Aug. 1983, "Fully Isolated Lateral Bipolar-MOS Transistors Fabricated in Zone-Melting-Recrystallized Si Films on SiO", Tsaur et al, pp. 269-271.
IEEE Electron Device Letters, vol. 14, No. 1, Jan. 1993, "A High-Performance Lateral Bipolar Transistor Fabricated on SIMOX", Parke et al, pp. 33-35.
Publication IEDM 92, (1992), "A Versatile, SOI BiCMOS Technology with Complementary Lateral BJT's", S. Parke et al, pp. 453-456.

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