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System level IC testing arrangement and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System method and article of manufacture for test operations

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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System of and method for decoding trellis codes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System of and method for decoding trellis codes

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System of testing the upstream cable modem channel

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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System pulse latch and shadow pulse latch coupled to output...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System signaling for payload fault detection and isolation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System signaling schemes for processor and memory module

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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System signalling schemes for processor & memory module

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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System technique for detecting soft errors in statically...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
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System to detect and identify errors in control information,...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System to limit access when calculating network data checksums

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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System to limit memory access when calculating network data...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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System to reduce programmable range specifications for a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System verification using one or more automata

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System with interleaver and de-interleaver

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System, apparatus and methods of dynamically determined...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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System, apparatus, and method for memory built-in self...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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System, apparatus, computer program product for performing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data pulse evaluation/bit decision
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System, computer-readable medium, and method for validating...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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