Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2008-02-21
2010-11-16
Chaudry, M. Mujtaba K (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S768000, C714S758000
Reexamination Certificate
active
07836378
ABSTRACT:
An integrated circuit, such as an integrated circuit memory or buffer device, method and system, among other embodiments, generate a plurality of error codes, such as CRC codes, corresponding to control information, write data and read data transactions, respectively. The plurality of separately generated CRC codes is logged or stored in respective storage circuits, such as circular buffers. The stored plurality of CRC codes corresponding to each transaction then may be used to determine whether an error occurred during a particular transaction and thus whether a retry of the particular transaction is issued. The integrated circuit includes a compare circuit to compare a CRC code generated by the integrated circuit with a CRC code provided by a controller device. A CRC code corresponding to read data is transferred to a controller device using a data mask signal line that is not being used during a read transaction. The CRC code generated by the integrated circuit then may be compared to a CRC code generated by the controller device to determine whether an error occurred. The controller device generates and stores a plurality of CRC codes, corresponding to control information, write data and read data. The controller device then compares the CRC codes generated by the controller device with CRC codes generated and stored in the integrated circuit to determine whether an error has occurred during a particular transaction.
REFERENCES:
patent: 3893072 (1975-07-01), D'Antonio et al.
patent: 4054911 (1977-10-01), Fletcher et al.
patent: 4363125 (1982-12-01), Brewer et al.
patent: 4394763 (1983-07-01), Nagano et al.
patent: 4456993 (1984-06-01), Taniguchi et al.
patent: 4527237 (1985-07-01), Frieder et al.
patent: 4535455 (1985-08-01), Peterson
patent: 4888773 (1989-12-01), Arlington
patent: 4920539 (1990-04-01), Albonesi
patent: 4970714 (1990-11-01), Chen et al.
patent: 5341251 (1994-08-01), Fincher et al.
patent: 5347643 (1994-09-01), Kondo et al.
patent: 5404361 (1995-04-01), Casorso et al.
patent: 5488691 (1996-01-01), Fuoco et al.
patent: 5490153 (1996-02-01), Gregg et al.
patent: 5502733 (1996-03-01), Kishi et al.
patent: 5553231 (1996-09-01), Papenberg et al.
patent: 5588112 (1996-12-01), Dearth et al.
patent: 5751932 (1998-05-01), Horst et al.
patent: 5751955 (1998-05-01), Sonnier et al.
patent: 5987628 (1999-11-01), Von Bokern et al.
patent: 6003151 (1999-12-01), Chuang
patent: 6189123 (2001-02-01), Anders Nystrom et al.
patent: 6308294 (2001-10-01), Ghosh et al.
patent: 6314541 (2001-11-01), Seytter et al.
patent: 6393504 (2002-05-01), Leung et al.
patent: 6397365 (2002-05-01), Brewer et al.
patent: 6438723 (2002-08-01), Kalliojarvi
patent: 6507928 (2003-01-01), Richardson
patent: 6606589 (2003-08-01), Tuma et al.
patent: 6625749 (2003-09-01), Quach
patent: 6725414 (2004-04-01), Seyyedy
patent: 6754856 (2004-06-01), Cofler et al.
patent: 6779148 (2004-08-01), Tanaka
patent: 6792501 (2004-09-01), Chen et al.
patent: 6851081 (2005-02-01), Yamamoto
patent: 6883130 (2005-04-01), Wilhelmsson et al.
patent: 6912682 (2005-06-01), Aoki
patent: 6941493 (2005-09-01), Phelps
patent: 6990604 (2006-01-01), Binger
patent: 7200770 (2007-04-01), Hartwell et al.
patent: 7231580 (2007-06-01), Shiota et al.
patent: 7339759 (2008-03-01), Hashimoto
patent: 7340641 (2008-03-01), Binger
patent: 7418436 (2008-08-01), Maeda et al.
patent: 7421547 (2008-09-01), Matsui et al.
patent: 7529965 (2009-05-01), Ikeuchi et al.
patent: 2002/0053042 (2002-05-01), Brown
patent: 2003/0115417 (2003-06-01), Corrigan
patent: 2004/0073649 (2004-04-01), Inami et al.
patent: 2004/0088497 (2004-05-01), Deans et al.
patent: 2004/0139310 (2004-07-01), Maeda et al.
patent: 2004/0205433 (2004-10-01), Gower et al.
patent: 2004/0209420 (2004-10-01), Ljungcrantz et al.
patent: 2004/0237001 (2004-11-01), Schulz et al.
patent: 2005/0055522 (2005-03-01), Yagi
patent: 2005/0073899 (2005-04-01), Gallivan et al.
patent: 2006/0077750 (2006-04-01), Pescatore
patent: 2006/0098320 (2006-05-01), Koga et al.
patent: 2006/0123483 (2006-06-01), Cohen
patent: 2007/0043917 (2007-02-01), Matsui et al.
patent: 2007/0150872 (2007-06-01), Vohra
patent: 2007/0162825 (2007-07-01), Wang et al.
patent: 2009/0006863 (2009-01-01), Mizuno
Siewiorek, Dan., Lecture Handout “20 Fault Tolerance & Memory Hierarchy,” Carnegie Mellon University, Nov. 23, 1998.
May, Phil, et al., “HiPER: A Compact Narrow Channel Router with Hop-by-Hop Error Correction,” IEEE Transactions on Parallel and Distributed Systems, vol. 13, No. 5, May 2002, pp. 485-498.
Haas, Jon, et al., “Advances in Server Memory Technology,” presented at Spring 2005 Intel Developers Forum, San Francisco, CA, Mar. 1, 2005.
Digital Equipment Corp.,“Software Product Description, Product Name: HSC Software, Ver. 6.5,” Jun. 1992.
Digital Equipment Corp., “Software Product Description, Product Name: HSC High Performance Software, Ver. 8.6,” Jun. 1996.
“Forward error correction,” Wikipedia, http://en.wikipedia.org/wiki/forward—error—correction.
International Search Report for International Application No. PCT/US2006/020698, mailed Mar. 6, 2007.
International Search Report & the Written Opinion of the International Searching Authority, Patent Cooperation Treaty, Application No. PCT/US2007/011733, Jan. 11, 2008.
International Preliminary Report on Patentability, Patent Cooperation Treaty, Application No. PCT/US2007/011733 filed on May 16, 2007, Aug. 12, 2008.
Restriction Requirement dated Jan. 8, 2010, United States Patent & Trademark Office, U.S. Appl. No. 11/436,284, filed May 18, 2006.
Response to Restriction Requirement dated Feb. 8, 2010, U.S. Appl. No. 11/436,284, filed May 18, 2006.
Kilbuck, Kevin, et al., “Fully Buffered DIMM - Unleashing Server Capacity,” Micron Technology, Inc., Apr. 8, 2005.
Non-Final Office Action dated May 3, 2010, U.S. Patent & Trademark Office, U.S. Appl. No. 11/436,284 filed May 18, 2006.
Response to Non-Final Office Action dated Aug. 3, 2010, U.S. Appl. No. 11/436,284 filed May 18, 2006.
Hampel Craig
Shaeffer Ian
Wang Yuanlong
Ware Fred
Chaudry M. Mujtaba K
Rambus Inc.
Vierra Magen Marcus & DeNiro LLP
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