Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-03-08
2005-03-08
Chase, Shelly A (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
Reexamination Certificate
active
06865711
ABSTRACT:
Systems and related methods are described for (1) determining one or more state probabilities for one or more states in a trellis representation; (2) determining an estimate of or extrinsic output for one or more bits using a trellis representation; (3) determining a branch metric for a branch in a trellis representation; (4) performing a MAX*2->1 operation; (5) performing a MAX*2p->1 operation, where p is an integer of two or more, through a hierarchical arrangement of MAX*2->1 operations; and (6) computing forward state probabilities in a forward mode of operation and computing backward state probabilities in a backward mode of operation. Combinations of the foregoing are also described.
REFERENCES:
patent: 5181209 (1993-01-01), Hagenauer et al.
patent: 5541955 (1996-07-01), Jacobsmeyer
patent: 5844946 (1998-12-01), Nagayasu
patent: 5933462 (1999-08-01), Viterbi et al.
patent: 6023783 (2000-02-01), Divsalar et al.
patent: 6408420 (2002-06-01), Todoroki
patent: 6510536 (2003-01-01), Crozier et al.
patent: 6563877 (2003-05-01), Abbaszadeh
patent: 6597743 (2003-07-01), Khayrallah et al.
Park et al., A block-wise MAP decoder using prbability ratio for branch metric, 1999, IEEE, p. 1610-1614.*
Boutillon et al., VLSI Architecture for the MAP algorithm, 1-2000, IEEE, p. 1-11.*
Robertson et al., A comparison of optimal and suboptimal MAP decoding algorithms operating in the Log domain, 1995, IEEE, p. 1009-1013.*
Bahl, L. R., et al.,Optimal Decoding of Linear Codes for Minimizing Symbol Error Rate; IEEE Transactions on Information Theory, Mar. 1974, pp. 284-287.
Benedetto, S. and Montorsi, G.,Serial concatenation of block and convolutional codes, Electronics Letters, vol. 32, No. 10, May 1996, pp. 887-888.
Benedetto, S. and Montorsi, G.,Iterative decoding of serially concatenated convolutional codes; Electronics Letters, vol. 32, No. 13, Jun. 1996, pp. 1186-1188.
Benedetto, S., et al.,A Soft-Input Soft-Output Maximum A Posteriori(MAP)Module to Decode Parallel and Serial Concatenated Codes; TDA Progress Report 42-127, Nov. 1996, pp. 1-20.
Benedetto, S. et al.,Serial Concatenated Trellis Coded Modulation with Iterative Decoding: Design and Performance, submitted to IEEE Comm. Theory Mini Conference 97 (Globecom 97), pp. 38-43.
Benedetto, S., and Divsalar, D.,Turbo Codes: Analysis, Design, Iterative Decoding and Applications, Course 909, Part II, International Courses for Telecom and Semiconductor Professionals, Oct. 25-29, 1999, Barcelona, Spain, pp. 324-339.
Berrou, C., et al.,Near Shannon Limit Error—Correcting Coding and Decoding: Turbo-Codes(1); IEEE, 1993, pp. 1064-1070.
Divsalar, D. and Pollara, F.,Serial and Hybrid Concatenated Codes with Applications; Jet Propulsion Laboratory, California Institute of Technology, pp. 1-8.
Divsalar, D. and Pollara, F.,Turbo Trellis Coded Modulation with Iterative Decoding for Mobile Satellite Communications; Jet Propulsion Laboratory, California Institute of Technology, pp. 1-7.
Divsalar, D., et al.,Serial Turbo Trellis Coded Modulation with Rate-1 Inner Code, Jet Propulsion Laboratory, California Institute of Technology, Jun. 2000, p. 194.
Divsalar, D., et al.,Serial Concatenated Trellis Coded Modulation with Rate-1 Inner Code, IEEE, 2000, pp. 777-782.
Hagenauer, J. and Hoeher, P.,A Viterbi Algorithm with Soft-Decision Outputs and its Applications; Proceedings of IEEE Globecom '89; Dallas, Texas, Nov. 1989; pp. 47.1.1-47.1.7.
Hoeher, Peter and Lodge, John, “Turbo DPSK”: Iterative Differential PSK Demodulation and Channel Decoding; IEEE Transactions on Communications, vol. 47, No. 6, Jun. 1999, pp. 837-843.
Narayanan, K. R. and Stüber, G. L.,A Serial Concatenation Approach to Iterative Demodulation and Decoding; IEEE Transactions on Communications, vol. 47, No. 7, Jul. 1999, pp. 956-961.
Nill, C. and Sundberg, C. W.,List and Soft Symbol Output Viterbi Agorithms: Extensions and Comparisons, IEEE Transactions on Communications, vol. 43, nos. 2/3/4, Feb./Mar./Apr., pp. 277-287.
Peleg, M. et al.,On Interleaved, Differentially Encoded Convolutional Codes, IEEE Transactions on Information Theory, vol. 45, No. 7, Nov. 1999, pp. 2572-2582.
Robertson, P., et al.,A Comparison of Optimal and Sub-Optimal MAP Decoding Algorithms Operating in the Log Domain; IEEE, 1995, pp. 1009-1013.
Viterbi, A.,An Intuitive Justification and a Simplified Implementation of the MAP Decoder for Convolutional Codes: IEEE Journal on Selected Areas in Communications, vol. 16, No. 2, Feb. 1998, pp. 260-264.
Pietrobon, S.S.,Implementation and Performance of a Turbo/Map Decoder, International Journal of Satellite Communications, vol. 16, pp. 23-46 (1998).
Robertson, P. and Worz, T.,Extensions of Turbo Trellis Coded Modulation to High Bandwidth Efficiencies, Institute for Communication Technology, pp. 1251-1255 (1997).
Cherubini, G. and Olcer, S.,Concatenated Coding for Binary Partial-Response Channels, Zurich Research Laboratory, IBM Research Division, pp. 1789-1794 (1994).
Benedetto, S. et al.,Iterative Decoding of Serially Concatenated Codes with Interleavers and Comparison with Turbo Codes, GLOBECOM '97, IEEE, vol. 2, pp. 654-658, Nov. 3, 1997.
Jung, P. et al.,Comprehensive Comparison of Turbo-Code Decoders, Proceedings of 45thIEEE Vehicular Technology Conference VTC '95, pp. 624-628, Jul. 25, 1995.
Ngo, T., et al.,Turbo Codes on the Fixed Point DSP TMS320C55x, 2000 IEEE Workshop on Signal Processing Systems, p. 255-264, Oct. 2000.
Park, G., et al.,An Implementation of a Turbo-Code Decoder Using a Block-Wise MAP Algorithm, IEEE Proceedings, 2000 Vehicular Technology Conference, vol. 6, pp. 2956-2961, Sep. 2000.
Raghupathy, A., et al.,A Transformation for Computational Latency Reduction in Turbo-Map Decoding, Proc. IEEE Int. Symp. on Circuits and Systems (ISCAS), pp. IV-402 to IV-405, Jun. 1999.
Vogt, J. et al.,Comparison of Different Turbo Decoder Realizations for IMT-2000, IEEE Proceedings GLOBECOM '99, vol. 5, pp. 2704-2708, Sep. 5-9, 1999.
Zhipei Chi, et al.,Iterative Decoding of Space-Time Trellis Codes and Related Implementation Issues, IEEE Proceedings of 2000 Asilomar Conference on Signals, Systems and Computers, 1:29, pp. 562-566, Nov. 2000.
Zhongfeng Wang, et al.,VLSI Implementation Issues of TURBO Decoder Design for Wireless Applications, Proc. of 1999 IEEE Workshop on Signal Processing Systems: Design and Implementation, pp. 503-512, Oct. 20, 1999.
Arad Eran
Dalumi Efraim
Eidson Donald B.
Kons Shachar
Chase Shelly A
Conexant Systems Inc.
Howrey Simon Arnold & White , LLP
LandOfFree
System of and method for decoding trellis codes does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System of and method for decoding trellis codes, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System of and method for decoding trellis codes will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3427556