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RAM based key equation solver apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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RAM functional test facilitation circuit with reduced scale

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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RAM-like test structure superimposed over rows of macrocells wit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Rambus ASIC having high speed testing function and testing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Random path delay testing methodology

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Random pattern weight control by pseudo random bit pattern...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Random-access multi-directional CDMA2000 turbo code interleaver

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
Reexamination Certificate

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Randomizer systems for producing multiple-symbol randomizing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Randomizer systems for producing multiple-symbol randomizing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Randomizer systems for producing multiple-symbol randomizing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Range splitting read/write methods for CD-MRW

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Rapid fail analysis of embedded objects

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Rate (M/N) code encoder, detector, and decoder for control data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Rate (M/N) code encoder, detector, and decoder for control data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Rate (M/N) code encoder, detector, and decoder for control data

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate

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Rate dematching processor

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Rate matching device and method for a data communication system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Rate matching device and method for a data communication system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Rate matching device and method for a data communication system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Rate matching device and rate matching method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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