Random-access multi-directional CDMA2000 turbo code interleaver

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...

Reexamination Certificate

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Details

C714S762000, C714S788000, C711S157000

Reexamination Certificate

active

06871303

ABSTRACT:
An interleaver that implements the LCS turbo interleaver algorithm utilized by the CDMA2000 standard is described. The interleaver includes a first computation unit for receiving an input address and computing a first sequential interleaved address during a first clock cycle in response thereto. A second computation unit is included for receiving an input address and computing a second sequential interleaved address during the first clock cycle in response thereto. The interleaver further includes a comparator for determining whether the first or the second sequential interleaved address is invalid and generating a signal in response thereto. The output of the comparator provides a control signal to a switch which selects the first or the second sequential interleaved address as an output interleaved address for the first clock cycle. The interleaver is further designed to move in a forward direction or a reverse direction.

REFERENCES:
patent: 5103459 (1992-04-01), Gilhousen et al.
patent: 5949796 (1999-09-01), Kumar
patent: 0035103 (2000-06-01), None
Sergio Benedetto, “Unveiling Turbo Codes: Some Results on Parallel Concatenated Coding Schemes,”IEEE Transactions On Information Theory, vol. 42, No. 2, pp. 409-428, Mar. 1996.

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