RAM based key equation solver apparatus

Details RAM based key equation solver apparatus RAM based key equation solver apparatus

1996-12-13

2000-02-08

Nguyen, Hoa T.

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

H03M 1300

Patent

active

060237821

ABSTRACT:
The present invention is a circuit for performing a computation of a plurality of coefficients of an error locator polynomial and a plurality of coefficients of an error evaluator polynomial in a system for correcting errors in a Reed-Solomon encoded datastream, comprising a syndrome generator outputting syndromes of the datastream. The circuit of the present invention is coupled to the syndrome generator and receives the syndromes. The present invention comprises an arithmetic unit iteratively generating intermediate and final values of the plurality of coefficients of an error locator polynomial and the plurality of coefficients of an error evaluator polynomial; a random access memory, storing the intermediate and final values of the plurality of coefficients of an error locator polynomial and the plurality of coefficients of an error evaluator polynomial; and a control unit, controlling the arithmetic unit and the memory and detecting when the computation of the plurality of coefficients of an error locator polynomial and the plurality of coefficients of an error evaluator polynomial has been completed.

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patent: 5642367 (1997-06-01), Kao

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