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Memory module with a test device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module with a test device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module with parallel testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module with parallel testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module with ranks of memory chips

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory module with test structure

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module with test structure

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory module, test system and method for testing one or a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory modules with error detection and correction

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory reduction in DVB-H applications

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory reduction techniques in a viterbi decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory redundancy implementation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Memory redundancy with programmable non-volatile control

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Memory redundancy with programmable non-volatile control

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Memory redundancy with programmable non-volatile control

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Memory repair system and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Memory self-test via a ring bus in a data processing apparatus

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Memory subsystems with fault isolation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory supervision

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Memory system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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