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Logical verification apparatus and method for memory control...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Long path at-speed testing

Error detection/correction and fault detection/recovery – Pulse or data error handling – Skew detection correction
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Long running test method for a circuit design analysis

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Look ahead scan chain diagnostic method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Look-ahead built-in self tests

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Look-ahead reallocation disk drive defect management

Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
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Look-up table addressing scheme

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Loop diagnostic mode for ADSL modems

Error detection/correction and fault detection/recovery – Pulse or data error handling – Transmission facility testing
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Loop profiling by instrumentation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Loop-Back Memory-Module Extender Card for Self-Testing...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Loop-back method for measuring the interface timing of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Loop-back method for measuring the interface timing of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Loss resilient code with cascading series of redundant layers

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Loss resilient code with double heavy tailed series of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Lossy compression of stakes in turbo decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Lost-cycle measurement using cycle counter

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Low area architecture in BCH decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Low complexity blind transport format detection

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Low complexity channel decoders

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Low complexity channel decoders

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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