LandOfFree - US Patents - Listing for Error detection/correction and fault detection/recovery,Pulse or data error handling

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Lowering voltage for cache memory operation

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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LSI communication device with automatic test capability

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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LSI defective automatic analysis system and analyzing method...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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LSI design system, logic correction support equipment, logic...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique

Reexamination Certificate

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LSI device having scan separators provided in number reduced...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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LSI device having scan separators provided in number reduced...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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LSI having a built-in self-test circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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LSI tester for use in LSI fault analysis

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Patent

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LSI, test pattern generating method for scan path test, LSI...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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LSSD interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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LSSD-compatible edge-triggered shift register latch

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

[ 0.00 ] – not rated yet Voters 0 Comments 0

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