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Mechanism for turbo decoding when CRC for partial blocks is...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory access control device, and its control method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Memory access system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory address generator in convolutional interleaver/deinterlea

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Memory and method for checking reading errors thereof

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory array organization

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory card and memory controller

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory card and memory controller

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory card and memory controller

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory card and memory controller

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory card with error correction scheme requiring reducing memo

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Memory cell supply voltage control based on error detection

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory circuit comprising an error correcting code

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory circuit, such as a DRAM, comprising an error...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory command unit throttle and error recovery

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory command unit throttle and error recovery

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory configuration scheme enabling parallel decoding of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory control circuit, nonvolatile storage apparatus, and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Memory control device and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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