Memory control device and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Details

C714S764000, C714S765000, C714S766000

Reexamination Certificate

active

06874117

ABSTRACT:
A memory control device and a method of controlling memory transfer. The memory control device has a command decoding device, a compare logic device, a decision device, a frame buffer decode device, a frame buffer range device and a command routing device. The frame buffer range device is used to determine if the access address pointed to a graphic memory. The command-decoding device and the compare logic device are used to determine if the access address points to a memory bank range having an error-check-correction function. The decision device is used to determine if the access address points to a memory bank range having error-check-correction function but outside the graphic memory range. If the access address points to a memory bank range having error-check-correction function but outside the graphic memory range, a memory access command with error checking and correction of data is executed.

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