H-matrix for error correcting circuitry
H-matrix for error correcting circuitry
Handling of hard errors in a cache of a data processing...
Hard disk drive with data error recovery using multiple...
Hard-decision iteration decoding based on an...
Hardware based memory scrubbing
Hardware circuit for the puncturing and repetitive coding of...
Hardware design for majority voting, and testing and...
Hardware design for majority voting, and testing and...
Hardware efficient CRC generator for high speed...
Hardware efficient CRC generator for high speed...
Hardware generator for uniform and Gaussian deviates...
Hardware mechanism for receiving frames from a link
Hardware-efficient CRC generator for high speed...
Hardware-efficient CRC generator for high speed...
Hardware-efficient low density parity check code for digital...
Hardware-efficient low density parity check code for digital...
HARQ method for guaranteeing QoS in a wireless communication...
HARQ transmission feedback for higher layer protocols in a...
Hashing system utilizing error correction coding techniques