Memory access control device, and its control method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

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G06F 1110

Patent

active

061675490

ABSTRACT:
A memory access control method which includes the step of using a data processor to subdivide a data sector into a plurality of data fields when storing data, then using an encoder to add a respective error correcting code to every data field, and then storing error correcting code encoded in a memory, and the step of decoding the respective error correcting code when reading data from the memory, then storing the decoded error correcting code in a recorder, and then controlling an error correcting logic circuit to compare the decoded error correcting code, and then controlling the data processor to correct the respective data field if the decoded error correcting code is denied after comparison or controlling the data processor to read the data for output if the decoded error correcting code is confirmed.

REFERENCES:
patent: 4672613 (1987-06-01), Foxworthy et al.

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