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N-dimensional iterative ECC method and apparatus with...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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NAND flash memory controller exporting a NAND interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Nanoscale interconnection interface

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Negotiated/dynamic error correction for streamed media

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Network communication protocol for large scale distribution...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Network error display apparatus and error detection display...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Network interface device for error detection using partial...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Network physical layer with embedded multi-standard CRC...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Network processor having cyclic redundancy check implemented...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Network processor having cyclic redundancy check implemented...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Network processor having cyclic redundancy check implemented...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Network processor having cyclic redundancy check implemented...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Network-based memory error decoding system and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Node processors for use in parity check decoders

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Noise and quality detector for use with turbo coded signals

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Noise removal in multibyte text encodings using statistical...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Non linear scaling of reliability values in a turbo decoder...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Non-relay initialization for modems

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Non-systematic coded error correction

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Non-volatile memory with error detection

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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