Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent
1997-06-03
1999-09-28
Grant, William
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
714767, 714773, 711103, G11C 2900, G06F 1342
Patent
active
059580798
ABSTRACT:
A memory card includes an error-correction-code (ECC) controller for generating ECCs, an ECC memory for storing ECCs generated by the ECC controller and an address converter for converting between addresses of the ECC memory and those of a main memory for storing data. The ECC controller generates an ECC to be stored in the ECC memory when a control data is input and the address converter fetches a relationship between an address of the ECC memory at which the generated ECC is stored and that of the main memory at which the control data is stored. Upon reading data stored in the main memory, error check and error correction operations are executed for the control data.
REFERENCES:
patent: 5699549 (1997-12-01), Cho
patent: 5754567 (1998-05-01), Norman
Calcano Ivan
Grant William
Mitsubishi Denki & Kabushiki Kaisha
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