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Method and apparatus for a N-nary logic circuit using capacitanc

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Patent

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Method and apparatus for a process, voltage, and temperature...

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Method and apparatus for a programmable level translator

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Reexamination Certificate

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Method and apparatus for a programmable output interface

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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Method and apparatus for a redundant transceiver architecture

Electronic digital logic circuitry – Multifunctional or programmable – Having details of setting or programming of interconnections...

Reexamination Certificate

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Method and apparatus for a reference clock buffer system

Electronic digital logic circuitry – Signal sensitivity or transmission integrity

Reexamination Certificate

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Method and apparatus for accessing stored data in a...

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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Method and apparatus for active line termination

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Reexamination Certificate

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Method and apparatus for active termination of a line driver/rec

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination

Patent

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Method and apparatus for adaptive chip trim adjustment

Electronic digital logic circuitry – Significant integrated structure – layout – or layout... – Field-effect transistor

Patent

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Method and apparatus for aligning the phases of digital...

Electronic digital logic circuitry – Reliability

Reexamination Certificate

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Method and apparatus for ameliorating the effects of noise...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Input noise margin enhancement

Reexamination Certificate

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Method and apparatus for ameliorating the effects of noise...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Input noise margin enhancement

Reexamination Certificate

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Method and apparatus for amplifying capacitively coupled...

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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Method and apparatus for an asynchronous pulse logic circuit

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Reexamination Certificate

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Method and apparatus for an N-NARY logic circuit

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Decoding

Reexamination Certificate

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Method and apparatus for asynchronously controlling a...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

Reexamination Certificate

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Method and apparatus for asynchronously controlling domino...

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Reexamination Certificate

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Method and apparatus for asynchronously controlling state...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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Method and apparatus for automatic high-speed bypass routing...

Electronic digital logic circuitry – Multifunctional or programmable – Array

Reexamination Certificate

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