Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Input noise margin enhancement
Reexamination Certificate
2008-03-04
2008-03-04
Barnie, Rexford (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Input noise margin enhancement
C326S026000
Reexamination Certificate
active
07339396
ABSTRACT:
A method and apparatus for ameliorating the effects of noise generated by a bus interface provides improved performance of integrated circuits having other circuits sensitive to the transient noise introduced by bus signal switching. Additional signals are generated that equalize the frequency of occurrences of the transients, so that an effectively constant and non-data-dependent frequency is generated over the totality of the signals. The loading characteristics of the additional signals and interface signals are matched, and the interface and additional signals may be generated as complementary pairs, so that the net DC energy of the transients is also substantially made equal to zero. Any or all of the interface and additional signals may be used as data signals, or all but one of the signals may be supplied to an internal or external dummy load. A loading circuit may be calibrated by a circuit that senses the interface loading.
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Barnie Rexford
Cirrus Logic Inc.
Harris Andrew M.
Mitch Harris Atty at Law, LLC
Tran Thienvu V
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