Method and apparatus for a programmable level translator

Details Method and apparatus for a programmable level translator Method and apparatus for a programmable level translator

2006-12-14

2008-11-25

Cho, James H (Department: 2819)

Electronic digital logic circuitry

Interface

Supply voltage level shifting

C326S068000

Reexamination Certificate

active

07456654

ABSTRACT:
A level translator includes a programmable booster stage that augments the drive level of the level translator under certain conditions. The booster stage is programmably activated. e.g., via a memory cell or control bit, and augments operation of the pull-up stages of a cross-coupled latch within the level translator. When the voltage levels at the high voltage portion of the level translator are reduced below a threshold voltage, the booster stage is activated to maintain proper operation of the level translator despite the reduced voltage levels.

REFERENCES:
patent: 6933765 (2005-08-01), Kanno et al.
patent: 7026855 (2006-04-01), Sueoka et al.
patent: 7205820 (2007-04-01), Yeung et al.

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