Method and apparatus for a process, voltage, and temperature...

Details Method and apparatus for a process, voltage, and temperature... Method and apparatus for a process, voltage, and temperature...

2009-01-29

2010-06-01

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S090000, C326S115000

Reexamination Certificate

active

07728630

ABSTRACT:
A method and apparatus to reduce the degradation in performance of semiconductor-based devices due to process, voltage, and temperature (PVT) and/or other causes of variation. Adaptive feedback mechanisms are employed to sense and correct performance degradation, while simultaneously facilitating configurability within integrated circuits (ICs) such as programmable logic devices (PLDs). A voltage-feedback mechanism is employed to detect PVT variation and mirrored current references are adaptively adjusted to track and substantially eliminate the PVT variation. More than one voltage-feedback mechanism may instead be utilized to detect PVT-based variations within a differential device, whereby a first voltage-feedback mechanism is utilized to detect common-mode voltage variation and a second voltage-feedback mechanism produces mirrored reference currents to substantially remove the common-mode voltage variation and facilitate symmetrical operation of the differential device. Edge boosting modules are employed to improve performance during reduced output common mode voltage modes of operation.

REFERENCES:
patent: 6504397 (2003-01-01), Hart et al.
patent: 7071739 (2006-07-01), Duzevik et al.
patent: 7635990 (2009-12-01), Ren et al.
U.S. Appl. No. 12/175,925, filed Jul. 18, 2008, Ren et al.
U.S. Appl. No. 12/361,804, filed Jan. 29, 2009, Ren et al.
U.S. Appl. No. 12/362,412, filed Jan. 29, 2009, Ren et al.

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