Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2005-12-06
2005-12-06
Cho, James H. (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S034000
Reexamination Certificate
active
06972596
ABSTRACT:
One embodiment of the present invention provides a system that amplifies capacitively coupled inter-chip communication signals. During operation, the system transmits a signal through a capacitive transmitter pad and receives a corresponding input signal through a capacitive receiver pad. The system amplifies the input signal by feeding it through a number of cascaded CMOS inverters operating from ever-increasing power supply voltages from the first to the last inverter. The system periodically initializes the input voltage of the first CMOS inverter by: suspending data transmission on the capacitive transmitter pad and setting the voltage on the capacitive transmitter pad to a middle point between a voltage that represents logic “1” and a voltage that represents logic “0”, coupling the output of the first CMOS inverter to its input through a switch, and, after the input voltage of the first CMOS inverter stage substantially stabilizes at the switching threshold, uncoupling the output of the first CMOS inverter stage from the input of the first CMOS inverter stage and then resuming data transmission on the capacitive transmitter pad.
REFERENCES:
patent: 4080539 (1978-03-01), Stewart
patent: 5852370 (1998-12-01), Ko
patent: 6847231 (2005-01-01), Kinugawa et al.
Bosnyak Robert J.
Proebsting Robert
Cho James H.
Park Vaughan & Fleming LLP
Sun Microsystems Inc.
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