Clock distribution scheme for user-programmable logic array arch
Clock distribution to facilitate gated clocks
Clock driver circuit and semiconductor integrated circuit device
Clock driver circuit in a centrally located macro cell layout re
Clock edge detection circuit
Clock enable control circuit for flip flops
Clock feeding circuit and method for adjusting clock skew
Clock frequency multiplying and squaring circuit and method
Clock frequency multiplying and squaring circuit and method
Clock gate buffering circuit
Clock gating cell for use in a cell library
Clock gating for synchronous circuits
Clock gating system and method
Clock gating to reduce power consumption of control and...
Clock generator
Clock induced supply noise reduction apparatus for a latch...
Clock induced supply noise reduction method for a latch...
Clock logic domino circuits for high-speed and energy...
Clock loss detector
Clock network for field programmable gate array