PCI-compatible programmable logic devices
Periodic computation structure based on 1-input lookup tables
Peripheral port with volatile and non-volatile configuration
Periphery clock signal distribution circuitry for structured...
Periphery input/output interconnect structure
Permutable switching network with enhanced interconnectivity...
Physically-enforced time-limited cores and method of operation
Pin multiplexing
Pin programmable reference
Pin selection system for microcontroller having multiplexer sele
Pinout architecture for a family of multiple segmented programma
Pipe-lined static router and scheduler for configurable logic sy
PLA architecture having improved clock signal to output timing u
PLA late signal circuitry using a specialized gap cell and PLA l
PLA late signal circuitry using a specialized gap cell and PLA l
PLD configurable logic block enabling the rapid calculation...
PLD having a window pane architecture with segmented and stagger
PLD having a window pane architecture with segmented...
PLD lookup table including transistors of more than one...
PLD lookup table including transistors of more than one...