Electronic digital logic circuitry – Multifunctional or programmable – Array
Patent
1998-04-24
2000-07-04
Santamauro, Jon
Electronic digital logic circuitry
Multifunctional or programmable
Array
326 39, H03K 19177
Patent
active
060844299
ABSTRACT:
A window pane architecture for FPGAs utilizes spaced subarrays having routing channels therebetween. In one embodiment, at least one routing channel includes segmented and staggered routing wires to minimize current loading and capacitive time delay. Connections between the configurable logic blocks, interconnect, and routing wires may be accomplished with switch matrices and programmable interconnect points.
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"The Programmable Logic Data Book", copyright 1998, available from Xilinx, Inc. at 2100 Logic Drive, San Jose, California 95124, pp. 4-225 to 4-241.
"More FPGAS" by W. R. Moore & Luk (eds.), Article by Malkit S. Jhitta, "Introduction of a New FPGA Architecture", 1994, published by Abingdon EE&CS Books, 49 Five Mile Drive, Oxford OX2 8HR, UK, pp 13-23.
Harms Jeanette S.
Santamauro Jon
Tachner Adam H.
Xilinx , Inc.
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