Memory in a programmable logic device

Details Memory in a programmable logic device Memory in a programmable logic device

1995-12-29

1998-09-08

Santamauro, Jon

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 39, H03K 19177

Patent

active

058049860

ABSTRACT:
A programmable logic device includes a plurality of logic blocks coupled to an interconnect matrix, wherein one of the plurality of logic blocks comprises configurable memory logic having control logic coupled to a storage element. The control logic receives a plurality of control signals from the interconnect matrix and performs substantially all logic functions required for the configurable memory logic to selectively function as each of a plurality of memory devices. The plurality of memory devices includes a first-in-first-out (FIFO) memory device, a last-in-first-out (LIFO) memory device, a single-port memory device (e.g. single-port SRAM) and a multi-port memory device (e.g. dual-port RAM). Additionally, multiple logic blocks may comprise configurable memory logic. Each logic block may perform a different memory function. These logic blocks can be cascaded together to form memory devices with greater memory depths and/or widths than possible with a single logic block with configurable memory logic.

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