Memory utilizing oxide nanolaminates

Details Memory utilizing oxide nanolaminates Memory utilizing oxide nanolaminates

2008-09-05

2010-06-01

Chang, Daniel D (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Array

C326S044000, C257S324000

Reexamination Certificate

active

07728626

ABSTRACT:
Structures, systems and methods for transistors utilizing oxide nanolaminates are provided. One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region by a gate insulator. The gate insulator includes oxide insulator nanolaminate layers with charge trapping in potential wells formed by different electron affinities of the insulator nanolaminate layers.

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