Look-up table using multi-level decode
Low power multiplexer circuit
Low power wordline decoder circuit with minimized hold time
Mask decoder circuit optimized for data path
Matrix decoder
Memory array having redundant word line
Memory having a decoder with improved address hold time
Method and apparatus for a fast variable precedence priority enc
Method and apparatus for a fast variable precedence priority enc
Method and apparatus for a N-nary logic circuit using 1 of N sig
Method and apparatus for an N-NARY logic circuit
Method and apparatus for low power domino decoding
Method and apparatus for passive component minimization of...
Method and apparatus for sharing a fet between a plurality of op
Method for forming programmable logic arrays using vertical...
Multiplexed flip-flop electronic device
Multiplexer having a plurality of internal data paths that opera
Multiplexer with level shift capabilities
Multiplexing of digital signals at multiple supply voltages...
Noise tolerant code setting circuit