Fetching all or portion of instructions in memory line up to...

Fetching and handling a bundle of instructions comprising instru

Fetching instructions from an instruction cache using sequential

Fetching instructions to instruction buffer for simultaneous...

Field programmable gate array and microcontroller...

Field programmable gate array and microcontroller...

Field programmable processor using dedicated arithmetic...

File replication methods and apparatus for reducing port...

Filter micro-coded accelerator

Finding a significant bit in a computer data word

Fine grained multi-thread dispatch block mechanism

Fixed length memory to memory arithmetic and architecture...

Fixed length memory to memory arithmetic and architecture...

Fixed point unit pipeline allowing partial instruction...

Fixed shift amount variable length instruction stream...

Flag bits evaluation for multiple vector SIMD channels...

Flag optimization of a trace

Flag renaming and flag masks within register alias table

Flags handling for system call instructions

Flexible demand-based resource allocation for multiple...