Conditional memory ordering

Conditional move instruction formed into one decoded...

Conditional move using a compare instruction generating a condit

Conditional next portion transferring of data stream to or...

Conditional vector arithmetic method and conditional vector...

Configurable bi-directional bus for communicating between...

Configurable branch prediction for a processor performing specul

Configurable branch prediction for a processor performing...

Configurable branch prediction for a processor performing...

Configurable branch prediction for a processor performing...

Configurable co-processor interface

Configurable co-processor interface

Configurable data processing device with bit reordering on...

Configurable finite state machine for operation of...

Configurable hardware register stack for CPU architectures

Configurable interconnection of multiple different type...

Configurable long instruction word architecture and...

Configurable out-of-order data transfer in a coprocessor...

Configurable output buffer ganging for a parallel processor

Configurable pipeline to process an operation at alternate...