Conditional vector arithmetic method and conditional vector...

Details Conditional vector arithmetic method and conditional vector... Conditional vector arithmetic method and conditional vector...

2006-06-13

2006-06-13

Pan, Daniel H. (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Vector processor

C712S221000, C712S226000, C708S521000, C708S525000

Reexamination Certificate

active

07062633

ABSTRACT:
It is decided whether a first source data from the memory101is a data which is to be subjected to arithmetic or not by a state flag detection means150, the result of the decision is retained as a state flag, and it is decided by a condition decision means109whether or not the state flag satisfies a condition for performing the arithmetic. A control means110controls whether an ALU100should perform the arithmetic or not on the basis of the condition satisfaction/dissatisfaction information.

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