Complex domain floating point VLIW DSP with data/program bus...
Complex vector executing clustered SIMD micro-architecture...
Component with a dynamically reconfigurable architecture
Composite uniprocessor
Compound instructions in a multi-threaded processor
Compressed instruction format for use in a VLIW processor
Compressed string and multiple generation engine
Compressing variable-length instruction prefix bytes
Compression of execution path history to improve branch...
Compression of processor instructions
Compression of program instructions using advanced...
Compression of program instructions using advanced...
Computation core executing multiple operation DSP...
Computation parallelization in software reconfigurable all...
Computation using codes for controlling configurable computation
Computer
Computer apparatus having special instructions to force...
Computer architecture capable of concurrent issuance and executi
Computer architecture capable of execution of general purpose mu
Computer architecture capable of execution of general...