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Method and apparatus for memory latency avoidance in a...

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Method and apparatus for merging binary translated basic blocks

Electrical computers and digital processing systems: processing – Instruction decoding
Patent

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Method and apparatus for modular reordering of portions of a com

Electrical computers and digital processing systems: processing – Processing architecture – Distributed processing system
Patent

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Method and apparatus for modulo scheduled loop execution in...

Electrical computers and digital processing systems: processing – Processing control – Branching
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Method and apparatus for monitoring inputs to an...

Electrical computers and digital processing systems: processing – Processing architecture – Array processor
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Method and apparatus for moving data in a parallel processor usi

Electrical computers and digital processing systems: processing – Processing architecture – Vector processor
Patent

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Method and apparatus for moving select non-contiguous bytes of p

Electrical computers and digital processing systems: processing – Processing architecture – Vector processor
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Method and apparatus for multi-mode fencing in a...

Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer
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Method and apparatus for multi-thread accumulation buffering...

Electrical computers and digital processing systems: processing – Processing control – Context preserving (e.g. – context swapping – checkpointing,...
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Method and apparatus for multiplatform stateless instruction...

Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate plural instruction...
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Method and apparatus for multiple load instruction execution

Electrical computers and digital processing systems: processing – Processing control – Processing control for data transfer
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Method and apparatus for nested control flow of instructions...

Electrical computers and digital processing systems: processing – Processing control – Instruction modification based on condition
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Method and apparatus for non-deterministic incremental...

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
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Method and apparatus for NOP folding

Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
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Method and apparatus for object code compression and...

Electrical computers and digital processing systems: processing – Instruction decoding
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Method and apparatus for object-oriented interrupt system

Electrical computers and digital processing systems: processing – Processing control – Specialized instruction processing in support of testing,...
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Method and apparatus for obtaining a scalar value directly...

Electrical computers and digital processing systems: processing – Processing architecture – Vector processor
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Method and apparatus for obtaining a scalar value directly...

Electrical computers and digital processing systems: processing – Processing control – Arithmetic operation instruction processing
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Method and apparatus for obtaining a scalar value directly...

Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
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Method and apparatus for obtaining a scalar value directly...

Electrical computers and digital processing systems: processing – Processing architecture – Vector processor
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