Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2011-04-26
2011-04-26
Huisman, David J (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S010000, C712S013000, C712S220000, C712S226000, C712S038000
Reexamination Certificate
active
07934075
ABSTRACT:
A computer array (10) has a plurality of computers (12). The computers (12) communicate with each other asynchronously and operate in a generally asynchronous manner internally. When one computer (12) attempts to communicate with another it goes to sleep until the other computer (12) is ready to complete the transaction, thereby saving power and reducing heat production. The instructions executed by the computers (12) can include a micro-loop (100) which is capable of performing a series of operations repeatedly. In one application, the sleeping computer (12) is awakened by an input such that it commences an action that would otherwise required an interrupt of an otherwise active computer. For example, one computer (12f) can be used to monitor an input/output port of the computer array (10).
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Fox Jeffrey Arthur
Moore Charles H.
Rible John W.
Henneman & Associates, PLLC
Henneman, Jr. Larry E.
Huisman David J
Partridge William B
VNS Portfolio LLC
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