TLB operations based on shared bit

Token based cache-coherence protocol

Trace based deallocation of entries in a versioning cache...

Trace based instruction caching

Trace cache filtering

Trace cache for efficient self-modifying code processing

Trace victim cache

Tracing instruction flow in an integrated processor

Tracing instruction flow in an integrated processor

Tracking temporal use associated with cache evictions

Transaction activation processor for controlling memory transact

Transaction manager and cache for processing agent

Transaction references for requests in a multi-processor...

Transfer of cache lines on-chip between processing cores in...

Transferring data along with code for program overlays

Transferring data between cache memory and a media access...

Transferring data between caches in a multiple processor environ

Transferring speculative data in lieu of requested data in a...

Transformational raid for hierarchical storage management system

Transforming flush queue command to memory barrier command...