Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-02-27
1999-09-28
Maung, Zarni
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711114, G06F 1100
Patent
active
059601698
ABSTRACT:
A flexible array of storage devices stores a plurality of blocks divided into sets of blocks called stripes, each block of a stripe being stored on a different device. An array controller supports formatting of the stripes independently in accordance with different memory structures. Specifically, the memory structures supported in the preferred embodiment are non-redundant, mirrored, and parity protected. Each block of storage exists in one of five states: (1) EMPTY; (2) DATA; (3) PARITY; (4) COPY; or (5) FREE. Each stripe of storage blocks exists within one of seven states which depend upon the states of the blocks. Certain slate transitions are defined, permitting stripes of one type to be converted to stripes of another type while minimizing the movement of data. Specifically, a stripe in a fully mirrored state is transformed to a parity protected state by designating any one block within the mirrored stripe as a PARITY block, and changing certain status information. No movement of data is necessary in this case. It is also possible to transform a non-redundant or parity protected stripe into a mirrored stripe.
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International Business Machines - Corporation
Maung Zarni
Ovedovitz David M.
Truelson Roy W.
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