Transferring data between caches in a multiple processor environ

Details Transferring data between caches in a multiple processor environ Transferring data between caches in a multiple processor environ

1996-03-14

2000-02-01

Swann, Tod R.

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

711119, 711124, 711130, G06F 1208

Patent

active

06021466&

ABSTRACT:
A cache system for multiple processors including multiple caches, one of the caches serving each respective processor, a main memory system, and a bus interconnecting the caches and the main memory, the bus allowing data to be written directly between the caches without accessing the main memory system.

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Pentium Processor Family User's Manual, vol. I: Pentium Processor Family Data Book, Copyright 1994. Chapter 18, pp. 18-1--18-18 and Chapter 20, pp. 20-1--20-31. Applicant is aware of multiprocessor cache systems in which write backs from one processor's cache to another processor's cache is made through the main memory.

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