TLB operations based on shared bit

Details TLB operations based on shared bit TLB operations based on shared bit

2005-01-04

2005-01-04

Bragdon, Reginald G. (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S207000, C711S144000, C711S133000, C711S135000

Reexamination Certificate

active

06839813

ABSTRACT:
A digital system and method of operation is provided in which several processing resources (340) and processors (350) are connected to a shared translation lookaside buffer (TLB) (300, 310(n)) of a memory management unit (MMU) and thereby access memory and devices. These resources can be instruction processors, coprocessors, DMA devices, etc. Each entry location in the TLB is filled a during the normal course of action by a set of translated address entries (308, 309) along with qualifier fields (301, 302, 303) that are incorporated with each entry. Operations can be performed on the TLB that are qualified by the various qualifier fields. A command (360) is sent by an MMU manager to the control circuitry of the TLB (320) during the course of operation. Commands are sent as needed to flush (invalidate), lock or unlock selected entries within the TLB. Each entry in the TLB is accessed (362, 368) and the qualifier field specified by the operation command is evaluated (364). This can be task ID field302, resource ID field301, shared indicator303, or combinations of these. Operation commands can also specify a selected virtual address entry (305). Each TLB entry is modified in response to the command (366) only if its qualifier field(s) match the qualifier(s) specified by the operation command.

REFERENCES:
patent: 5319760 (1994-06-01), Mason et al.
patent: 5479627 (1995-12-01), Khalidi et al.
patent: 5754818 (1998-05-01), Mohamed
patent: 5796978 (1998-08-01), Yoshioka et al.
patent: 6009333 (1999-12-01), Chaco
patent: 6119204 (2000-09-01), Chang et al.
patent: 6266755 (2001-07-01), Yeager
patent: 6339816 (2002-01-01), Bausch
patent: 6349355 (2002-02-01), Draves et al.
patent: 6370632 (2002-04-01), Kikuta et al.
Joe Heinrich, “MIPS R4000 Microprocessor User's Manual, Second Edition”, MIPS Technologies, Inc., 1994; pp. 61-98 and 12 131.*
Michael Slater, “A Guide to RISC Microprocessors”, Academic Press, Inc., 1992; pp. 114-116.*
Joe Heinrich, “MIPS R4000 Microprocessor User's Manual, Second Edition”, MIPS Technologies, Inc., 1994; pp. 271-273.

Affiliated with

Also associated with

Rating

TLB operations based on shared bit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with TLB operations based on shared bit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and TLB operations based on shared bit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3422643