Field programmable network processor and method for...

Figure operation of layout for high speed processing

Final design method of a programmable logic device that is...

FinFET layout generation

First approximation for OPC significant speed-up

First time silicon and proto test cell notification

Fitting for incremental compilation of electronic designs

Flash configuration cache

Flash memory compiler with flexible configurations

Flash-based anti-aliasing techniques for high-accuracy high...

Flash-based updating techniques for high-accuracy high...

Flexible cache architecture using modular arrays

Flexible design for memory use in integrated circuits

Flexible I/O routing resources

Flexible preamble processing for detecting a code sequence

Flexible width cell layout architecture

Flip chip trace library generator

Flip-flop insertion in a circuit design

Flip-flop insertion method for global interconnect pipelining

Flip-flop insertion method for global interconnect pipelining