Delay estimation using edge specific miller capacitances
Delay fault test quality calculation apparatus, delay fault...
Delay library representation method, delay library...
Delay model circuit for use in delay locked loop
Delay optimization designing system and delay optimization...
Delay optimization in signal routing
Delay optimized mapping for programmable gate arrays with...
Delay route searching method and apparatus for logical...
Delay time calculation apparatus and integrated circuit...
Delay verification device for logic circuit and delay...
Delay/load estimation for use in integrated circuit design
Delta-geometry timing prediction in integrated circuit...
Demultiplexer for a molecular wire crossbar network (MWCN...
Dense OPC
Density driven assignment of coordinates
Density driven layout for RRAM configuration module
Density driven layout for RRAM configuration module
Depopulated programmable logic array
Depopulated programmable logic array
Derivation of circuit block constraints