Density driven layout for RRAM configuration module

Details Density driven layout for RRAM configuration module Density driven layout for RRAM configuration module

2007-06-01

2010-10-19

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

07818703

ABSTRACT:
A system for layout of a module in an integrated circuit layout pattern has a cell library and a cell placement system. The cell library includes a plurality of cells. The cell placement system is adapted to select one or more cells from the cell library and to locally place each selected cell within the module layout so that each cell pin of the selected cells and each port of the module layout occupies a unique vertical routing track within the module layout.

REFERENCES:
patent: 6088519 (2000-07-01), Koford
patent: 6292929 (2001-09-01), Scepanovic et al.
patent: 6446248 (2002-09-01), Solomon et al.
patent: 6492736 (2002-12-01), Chan et al.
patent: 6564364 (2003-05-01), Dahl et al.
patent: 6665850 (2003-12-01), Andreev et al.
patent: 6691283 (2004-02-01), Gashkov et al.
patent: 6691290 (2004-02-01), Wu
patent: 6757881 (2004-06-01), Andreev et al.
patent: 6760896 (2004-07-01), Andreev et al.
patent: 6766500 (2004-07-01), Donelly et al.
patent: 6766501 (2004-07-01), Duggirala et al.
patent: 6938226 (2005-08-01), Nguyen et al.
patent: 7028285 (2006-04-01), Cote et al.
patent: 2003/0231211 (2003-12-01), Shah et al.
patent: 2004/0114429 (2004-06-01), Ehiro et al.
Wey, C.L. and Lombardi, F.; “On the Repair of Redundant RAM's,”IEEE Transactions on Computer-Aided Design, vol. CAD-6, No. 2, Mar. 1987, pp. 222-231.
W.W. Zhuang et al.; “Novell Colossal Magnetoresistive Thin Film Nonvolatile Resistance Random Access Memory (RRAM),”IEEE Transactions2002, pp. 193-196.
Yi-Chou Chen et al.; “An Access-Transistor-Free (0T/1R) Non-Volatile Resistance Random Access Memory (RRAM) Using a Novel Threshold Switching, Self-Rectifying Chalcogenide Device,”IEEE Transactions2003, pp. 905-908.
Battaglini, G. and Ciciani, B.; “An Improved Analytical Yield Evaluation Method for Redundant RAM's,” Dept. fo Systems and Computer Engineering, University of Rome, Italy, pp. 1-7.
K. Ganapathy et al.; “Yield Modeling & Optimization of Large Redundant RAM's,”IEEE Transactions, International Conference on Wafer Scale Integration 1990, pp. 273-287.
R. Haddad et al.; “Increased Throughput for the Testing and Repair of RAM's with Redundancy,”IEEE Transactions on Computers, vol. 40, No. 2, Feb. 1991, pp. 154-166.
Libeskind-Hadas, R. & Liu, C.L.; “Fast Search Algorithms for Reconfiguration Problems,”IEEE Transactions, 1991 International Workshop on Defect and Fault Tolerance on VLSI Systems, pp. 260-273.
Leong, H.W. & Low, C.P.; “New Results on Fault Covering in RRAMs,”IEEE Transactions, pp. 2148-2151.
Low, C.P. and Leong, H.W.; “A New Class of Efficient Algorithms for Reconfiguration of Memory Array,”IEEE Transactions on Computers, vol. 45, No. 5, May 1996, pp. 614-618.

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