Delay time calculation apparatus and integrated circuit...

Details Delay time calculation apparatus and integrated circuit... Delay time calculation apparatus and integrated circuit...

2006-01-10

2006-01-10

Garbowski, Leigh M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000

Reexamination Certificate

active

06986115

ABSTRACT:
A delay time calculation apparatus includes a resistance-capacitance determining section for determining a source resistance and a diffusion capacitance of a target gate of a delay time calculation before a process variation, and a wiring resistance and a wiring capacitance of a wire connected to the gate after the process variation. The delay time of the gate is calculated according to the results the resistance-capacitance determining section obtains. It can solve a problem of a conventional apparatus in that although the conventional apparatus can calculate the delay time of the gate accurately as long as the process variation coefficients for the cell delay and wire delay match the target gate of the delay time calculation, it becomes increasingly difficult to calculate the delay time accurately with an increase in the error of the process variation coefficients.

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